- Create metal connections to all clock and signal pins.
- Metal traces must meet physical DRC requirements.
- Minimize total wire length, the total number of vias ,completing the connections without increasing the chip area.
- Each net meet its timing budget.
After placement step, the exact locations of the cells and pins are fixed.Now physical connections defined in the netlist needs to be done in the routing step.This is done using wires(metal) to connect the terminals in each net.
The process of finding geometric layout for the nets is called routing.
The objective of routing depend on the nature of design.
In general purpose design, it is sufficient to minimize the total length of the wire while completing the physical connections.
In high performance designs it is crucial to meet the timing target,and also there are special purpose nets like clock, power and ground nets which require special treatment.
Metal traces must meet design rule reuirements.
A chip might contain millions of transistor and as a result millions of net needs to be routed to complete the layout.To find the best possible way to route is difficult to compute.
Steps in routing:
Global routing:
In global routing, a loose route for each net is generated.It assigns a list of routing regions to each net without specifying the actual geometric layout of the wires.
Global routing cells are defined , their size is equal to height of the average standard cells.
Global route determine whether each assigned GRC along a path has enough wire tracks for assigned nets through the edges of that GRC.If there are not enough wire tracks ,global route reassigns metal layers and global route cells accordingly.
Global route gives more accurate parasitic and delay estimates compared to virtual route.
Track assignment:
Assign each net to a specific track and lays down actual metal traces.
It also attempts to:
- make long straight traces.
- reduce the no of vias.
Detail routing:
It performs actual physical interconnections of the design.Detail router can grid based or grid less.
Grid based routing:
Grid based routing imposes routing grid (evenly spaced routing tracks running both vertically and horizontally across the design area) that all routing segments must follow.The router is allowed o change direction at the intersection of vertical and horizontal tracks.
The advantage of grid based routing is efficiency. When using a grid based router , one needs to make sure that the ports of all instances are on grid otherwise they can create physical design rule errors which would be difficult to resolve.
Metal traces or routes are created and centered on routing tracks. Each metal layer has its own track and preferred routing direction.These metal routes must meet minimum width and spacing requirements to prevent defects during fabrication.
M1-horizontal
M2-vertical
The tracks and preferred routing direction are defined in the unit tile cell in the standard cell library.The design rule spacing and widths in the technology file for each metal layer which are not checked during the track assignment phase.These rules are checked in detail routing and search and repair phase.Detail routing tries to fix the design rules (minimum width, spacing, etc) which were violated during track assignment.
Grid-based systems use these pitches (width + spacing) to determine the minimum center to center space for each metal layer. The design rule information to form this grid is located in the technology file for each metal layer.
Routing Design rule:
Minimum length rule:
To specify the minimum wire length allowed.
Notch spacing:
While routing if the net creates spacing violations to itself(same metal) it is notch violation.
Notch rule specifies minimum notch width and height.
Defining Minimum Via Spacing Rules in the Same Net or different net.
Metal Density rule:
The total percentage of the named metal layer in the window size will be within the specified minimum and maximum density limits.
Search and Repair:
The design is broken into switch boxes of fixed sizes, DRC violations are fixed through multiple loops and each time S-box is made progressively larger to incorporate the larger portion of the design.
The search and repair stage is the last step in the routing process. Once search and repair has resolved all design rule violations, the design is considered to have been placed and routed and ready for verification and fabrication.
Congestion:
A major problem with grid based routing is congestion of metal routes.Congestion results when there are more wires in the design to route than the tracks available.Typically only small areas of the design experience congestion in which standard cells can be moved accordingly. If the congestion is severe, more extreme measures may need to be taken such as the moving of macros or the re-floor planning of the entire design.
